I wanted to create a generic makefile that can take the source file name compile it, save it as the object file and executable file. Both files using the original source name. Thank you for your help.
exec: \
compile
./helloworld #I would like to input source outside the make file.
compile: \
helloworld.c
gcc -Wall helloworld.c -o helloworld #<==
echo 'compiling'
touch compile
#I would like makefile to automatically save both object and exec.
#as the source file name.
You can use the $(MAKECMDGOALS) variable thus:
ReplyDeleteCFLAGS = -Wall
$(MAKECMDGOALS): $(MAKECMDGOALS).o
and then simply call Make like this:
make myfile
If you have Make 3.81 or later, then this can become:
CFLAGS = -Wall
.SECONDARY: # Prevents intermediate files from being deleted
If you're not interested in saving the intermediate object file, then you don't even need a Makefile. You can simply do:
make bar CFLAGS=-Wall